
FPGAs and Time Sensitive Networking in Industrial Applications
16/12/2025 | 13 min
In this episode, Electronic Design talks to Karl Wachswender, Senior Principal System Architect at Lattice Semiconductor. Lattice is well known for its power efficient FPGAs that support artificial intelligence (AI) applications. They also address post-quantum cryptography, and are found in demanding applications like automotive.

Creating On-Chip MEMS Sensors in CMOS
09/12/2025 | 15 min
Nanusens creates nanoscale sensor structures inside the CMOS layers using standard CMOS processes within the same production flow as making the control electronics on the same chip. This approach reduces the size and cost as it benefits from the vast economies of scale of using giant CMOS fabs. The resulting single chip solution has a packaged size of 0.5 mm³. This episode delves into the technology, its future, and some limitations.

Utilizing Time-Sensitive Networking in Industrial Control
02/12/2025 | 9 min
Christian Bornschein, Manager of Marketing & Sales at Port Industrial Automation, talks about how Time-Sensitive Networking (TSN) is employed in industrial automation. We also discuss some real-world examples and how TSN enables simpler, more effective industrial control product development.

RAID in the NVMe Era
25/11/2025 | 23 min
RAID, redundant array of independent disks, uses redundancy to provide a more robust disk drive array capable of operation even with the loss of a drive. RAID 1 replicates data with a 50% overhead. RAID 5 and 6 are more common in larger arrays with less overhead as more drives are added to the mix but with a tradeoff in performance. Mark Anthony, Product Line Manager at Microchip Technology, talks about the company's SmartRAID 4300 Series, which is designed to accelerate the operation of RAID arrays implemented build on NVMe drives.

The Importance of Chipscale Packaging in Electronics
18/11/2025 | 18 min
AI workloads and other advanced computing applications continue to expand, pressuring the development community with the dual challenges of performance and manufacturability. Traditional SoCs are approaching their limits in terms of size, yield, and cost, and one solution lies in chiplet-based architectures. In this episode, we talk to Larry Zu, CEO at Sarcina Technology, and how the company is deploying interconnect to minimize signal crosstalk and enhance signal integrity.



Inside Electronics